Parallel additive scrambler and descrambler
作者： Heinz Dipl Ing Wettengel , Hartmut Dipl Ing Borschel
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摘要: Parallel working additive scramblers produce a predetermined pseudorandom sequence of length L in word generator, which consists an N-stage shift register. To obtain more than N parallel located sequences, the generator is connected to network which, addition sequences created by modulo-2 addition, other are with different phase relation. Performing linkage operations limits maximum bit rate that can be transmitted. The entire stored memory (S). desired produced circular storage (RS) means shifting operations. form feedback register (SR) and used as (S), each outputs input EXOR-gate, added partial stream parallelized serial data stream. streams subsequently converted parallel-serial multiplexer. Data higher possible.
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