Relevance of off-state NBTI degradation in depletion HVNMOS transistor for power application

摘要: For the reliability assessment of HV depletion NMOS devices, relevant off-state degradation mechanisms are discussed and quantified on example a transistor in 130 nm power technology. It can be shown that depending its construction, suffer from combined gate drain voltage stress observed $\mathrm{V}_{\mathrm{t}\mathrm{h}}$ shifts have to attributed exclusively NBTI effect. Furthermore, it is explained by considering possible circuit applications this mechanism critical causing significant leakage increase or even unintended device turn-on over lifetime. Finally, as prevention measure, fluorine implantation into oxide for improving with respect effect investigated.