Design and Applications of Approximate Circuits by Gate-Level Pruning

摘要: Energy-efficiency is a critical concern for many systems, ranging from Internet of things objects and mobile devices to high-performance computers. Moreover, after 40 years prosperity, Moore’s law starting show its economic technical limits. Noticing that circuits are over-engineered applications error-resilient or require less precision than offered by the existing hardware, approximate computing has emerged as potential solution pursue improvements digital circuits. In this regard, technique systematically tradeoff accuracy in exchange area, power, delay savings proposed: gate-level pruning (GLP). A CAD tool build integrated into standard flow offer wide range cost-accuracy tradeoffs any conventional design. The methodology first demonstrated on adders, achieving up 78% energy-delay-area reduction 10% mean relative error. It then detailed how can be applied more complex system composed multitude arithmetic blocks memory: discrete cosine transform (DCT), which key building block image video processing applications. Even though represent 4% entire DCT it shown GLP lead 21% over reasonable quality loss 24 dB. This significant saving achieved thanks pruned circuits, sets some nodes at constant values, enabling synthesis further simplify circuit memory.