Optimal Slope Ranking: An Approximate Computing Approach for Circuit Pruning

摘要: In recent years, approximate computing has been widely used in low power digital circuits design. As it incurs error computation, there are always tradeoffs between hardware performances and computational accuracy. Thus, the circuit implementation can vary from applications to even same application, which makes difficult evaluate design efficiency terms of delay, this paper, (AE) is proposed as a new metric dedicated energy-efficient computation. An automatic pruning approach presented based on quickly estimated AE, leads an efficient significant reduction energy dissipation. A 32-bit adder demonstrated using method compared with other approximation methods, including direct truncation significance-activity method. For legitimate comparisons, accuracy obtained for all imprecise adders. The simulation results show that assessed mean absolute error, outperforms others. With given threshold, reach 31.15% energy-delay-product most competitive contender.