Follower voltage flipped with FGMOS transistors for low-voltage and low-power applications
作者： Jesus de la Cruz-Alejo
DOI: 10.1109/ICEEE.2013.6676016
关键词:
摘要: In this paper a new follower voltage flipped (FVF), with floating gate CMOS transistors (FGMOS) is proposed. To demonstrate that the proposed structure FGMOS very suitable to solve problems for analog cells design low and power, theoretical steps are presented together its simulation. The output of FVF insensitive device parameters loaded resistive load. consists three one current mirror. Simulated results compared those obtained by analysis. show in 0.13μm process exhibits significant benefits terms linearity, insensibility parameters, bandwidth impedance. power supply 0.8V consumption 81μW, THD 3% 0.5Vp-p 1GHz sinewave input 30KHz load resistance.
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