Mapping data-flow graph to loop engine on array processor
作者： Yong Dou , Xicheng Lu
DOI: 10.1109/PDCAT.2003.1236389
关键词:
摘要: We present a novel architecture for array processor, called LEAP, which is set of simple processing elements. The targeted programs are perfect innermost loops. By using the technique if-conversion, control dependence can be converted to data prediction variables. Then an loop represented by graph, where vertex supports expression statements high level languages. mapping graph fixed PEs, each PE steps iteration automatically and independently at runtime. execution forms multiple pipelining chains. simulation four loops LFK shows effectiveness LEAP architecture, compared with traditional CISC RISC architectures.
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