Retiming and clock skew for synchronous systems
作者： Liang-Fang Chao , Hsing-Mean Sha
DOI: 10.1109/ISCAS.1994.408810
关键词:
摘要: … a data-flout graph (DFG) to capture tlie intended behavior of the circuit without clock skew and retiming. Each combinational element corresponds to a node in a DFG; edges represent …
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