Hardware-software design flow for heterogeneous and programmable devices
作者： Kathail Vinod K , Monga Dinesh K , Jha Pradip , Beeravolu Srinivas , Gupta Shail Aditya
DOI:
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摘要: For an application specifying a software portion for implementation within data processing engine (DPE) array of device and hardware programmable logic (PL) the device, logical architecture first interface solution mapping resources to circuit block between DPE are generated. A diagram is built based on solution. An flow performed diagram. The compiled in one or more DPEs array.
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