Simultaneous real-time trace and debug for multiple processing core systems on a chip

摘要: A system for providing simultaneous, real-time trace and debug of a multiple processing core on chip (SoC) is described. Coupled to each output bus. Each bus passes core's operation capture nodes connected together in daisy-chains. Trace node daisy-chains terminate at the control module. The module receives filters data decides whether store into memory. also contains shadow register capturing internal state traced just prior its tracing. Stored data, along with corresponding contents, are transferred out off SoC host agent running debugger hardware software via JTAG interface.