Cluster Based Networks-on-Chip: An Efficient and Fault-Tolerant Architecture using Network Interface Assisted Routing

摘要: Partial Virtual channel Sharing PVS architecture has been proposed to enhance the performance of Networks-on-Chip NoC based systems. In this paper, authors present an efficient and reliable Network Interface NI assisted routing strategy for using architecture. For purpose, system is divided into clusters. Each cluster a group two nodes comprising Processing Elements PE, switches, links, etc. PE in can inject data network through router, which closer destination. This helps reduce load by reducing average hop count network. The recover disconnected from due level faults allowing transmit receive packets other router cluster. 5×6 crossbar used requires one more 5×1 multiplexer without increasing critical path delay as compared 5×5 crossbar. simulated uniform, transpose negative exponential distribution NED traffic patterns. simulation results show significant reduction packet latency at expense negligible area overhead.