System for testing digital circuits

摘要: Test node equipment is provided between successive component groups operating in cascade and each test connected to a data bus system through which patterns can be by pattern generator from signals evaluated analyzer, the analyzer being under control of computer. Each has state output preceding group passes it next with only possibility monitoring possible deficiencies computer other states operation interrupted at for inserting following or receiving processed group. A may also contain driver circuits transfer rapid memory subsequent processing lower speed assist use so-called signature analysis system.