A 4.6W/mm 2 power density 86% efficiency on-chip switched capacitor DC-DC converter in 32 nm SOI CMOS
作者： Toke M. Andersen , Florian Krismer , Johann W. Kolar , Thomas Toifl , Christian Menolfi
DOI: 10.1109/APEC.2013.6520285
关键词:
摘要: The future trends in microprocessor supply current requirements represent a bottleneck for next generation high-performance microprocessors since the number of pins will constitute an increasingly larger fraction total package available. This leaves few available signaling. On-chip power conversion is means to overcome this limitation by increasing input voltage - thereby reducing and performing final on chip itself. paper details design implementation on-chip switched capacitor converters deep submicron technologies. High capacitance density trench capacitors with low parasitic bottom plate ratio technology facilitate high efficiency converter implementations. measured performance 2 : 1 implemented 32nm SOI CMOS 1.8V results 4.6W/mm2 at 86% when operated switching frequency 100MHz.
sci-hub.se 参考文章(16)
Yogesh Kumar Ramadass, Energy processing circuits for low-power applications Massachusetts Institute of Technology. ,(2009)
Hanh-Phuc Le, Michael Seeman, Seth R. Sanders, Visvesh Sathe, Samuel Naffziger, Elad Alon, A 32nm fully integrated reconfigurable switched-capacitor DC-DC converter delivering 0.55W/mm 2 at 81% efficiency international solid-state circuits conference. pp. 210- 211 ,(2010) , 10.1109/ISSCC.2010.5433981
Yuval Beck, Sigmond Singer, Capacitive Transposed Series-Parallel Topology With Fine Tuning Capabilities IEEE Transactions on Circuits and Systems. ,vol. 58, pp. 51- 61 ,(2011) , 10.1109/TCSI.2010.2055277
Leland Chang, David J Frank, Robert K Montoye, Steven J Koester, Brian L Ji, Paul W Coteus, Robert H Dennard, Wilfried Haensch, Practical Strategies for Power-Efficient Computing Technologies Proceedings of the IEEE. ,vol. 98, pp. 215- 236 ,(2010) , 10.1109/JPROC.2009.2035451
Yogesh Ramadass, Ayman Fayed, Baher Haroun, Anantha Chandrakasan, A 0.16mm 2 completely on-chip switched-capacitor DC-DC converter using digital capacitance modulation for LDO replacement in 45nm CMOS international solid-state circuits conference. pp. 208- 209 ,(2010) , 10.1109/ISSCC.2010.5433984
Pingqiang Zhou, Dong Jiao, Chris H. Kim, Sachin S. Sapatnekar, Exploration of on-chip switched-capacitor DC-DC converter for multicore processors using a distributed power delivery network custom integrated circuits conference. pp. 1- 4 ,(2011) , 10.1109/CICC.2011.6055333
Ronald P. Luijten, Phillip Stanley-Marbell, Victoria Caparros Cabezas, Pinned to the walls: impact of packaging and application properties on the memory and power walls international symposium on low power electronics and design. pp. 51- 56 ,(2011) , 10.5555/2016802.2016815
Leland Chang, Robert K. Montoye, Brian L. Ji, Alan J. Weger, Kevin G. Stawiasz, Robert H. Dennard, A fully-integrated switched-capacitor 2∶1 voltage converter with regulation capability and 90% efficiency at 2.3A/mm 2 symposium on vlsi circuits. pp. 55- 56 ,(2010) , 10.1109/VLSIC.2010.5560267
G. Wang, D. Anand, N. Butt, A. Cestero, M. Chudzik, J. Ervin, S. Fang, G. Freeman, H. Ho, B. Khan, B. Kim, W. Kong, R. Krishnan, S. Krishnan, O. Kwon, J. Liu, K. McStay, E. Nelson, K. Nummy, P. Parries, J. Sim, R. Takalkar, A. Tessier, R.M. Todi, R. Malik, S. Stiffler, S.S. Iyer, Scaling deep trench based eDRAM on SOI to 32nm and Beyond international electron devices meeting. pp. 1- 4 ,(2009) , 10.1109/IEDM.2009.5424375
Tom Van Breussegem, Michiel Steyaert, A 82% efficiency 0.5% ripple 16-phase fully integrated capacitive voltage doubler symposium on vlsi circuits. pp. 198- 199 ,(2009)