AF-Test: Adaptive-Frequency Scan Test Methodology for Small-Delay Defects
作者： Tsung-Yeh Li , Shi-Yu Huang , Hsuan-Jung Hsu , Chao-Wen Tzeng , Chih-Tsun Huang
DOI: 10.1109/DFT.2010.48
关键词:
摘要: Small delay defects, when escaping from traditional testing, could cause a device to malfunction in the field. To address this issue, we propose an adaptive-frequency test method, abbreviated as AF-test. In versatile clocks can be generated on chip by embedding All-Digital Phase-Locked Loop (ADPLL) into circuit under (CUT). Instead of measuring exact propagation associated with each pattern like previous time-consuming failing frequency signature based analysis [14], only up three different clock frequencies for provide benefit fast characterization, and thereby making it suitable volume production test. We have successfully demonstrated AF-test in-house wireless platform called HOY system using fabricated chips. This method not detect small defects effectively but also grading scheme those marginal chips that might reliability problem.
ieeecomputersociety.org参考文章(18)
Gordon L. Smith, Model for Delay Faults Based Upon Paths international test conference. pp. 342- 351 ,(1985)
S. Davidson, Towards an understanding of no trouble found devices vlsi test symposium. pp. 147- 152 ,(2005) , 10.1109/VTS.2005.86
Jaekwang Lee, Edward J. McCluskey, Failing Frequency Signature Analysis international test conference. pp. 1- 8 ,(2008) , 10.1109/TEST.2008.4700561
John Waicukauski, Eric Lindbloom, Barry Rosen, Vijay Iyengar, Transition Fault Simulation IEEE Design & Test of Computers. ,vol. 4, pp. 32- 38 ,(1987) , 10.1109/MDT.1987.295104
P. Nigh, A. Gattiker, Test method evaluation experiments and data international test conference. pp. 454- 463 ,(2000) , 10.1109/TEST.2000.894237
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram, Timing-based delay test for screening small delay defects design automation conference. pp. 320- 325 ,(2006) , 10.1145/1146909.1146993
Kun-Han Tsai, M. Kassab, Xijiang Lin, T. Kobayashi, J. Rajski, Chen Wang, S. Hamada, Y. Sato, T. Aikyo, R. Klingenberg, Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects asian test symposium. pp. 139- 146 ,(2006) , 10.1109/ATS.2006.81
Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor, Test-Pattern Grading and Pattern Selection for Small-Delay Defects vlsi test symposium. pp. 233- 239 ,(2008) , 10.1109/VTS.2008.32
K. Baker, G. Gronthoud, M. Lousberg, I. Schanstra, C. Hawkins, Defect-based delay testing of resistive vias-contacts a critical evaluation international test conference. pp. 467- 476 ,(1999) , 10.1109/TEST.1999.805769
R. Putman, R. Gawde, Enhanced timing-based transition delay testing for small delay defects vlsi test symposium. pp. 336- 342 ,(2006) , 10.1109/VTS.2006.33