作者: Jerry Chuang , William C. Black , Scott A. Irwin
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摘要: A device and a method for processing high data rate serial includes circuitry recovering clock based on the input stream. transceiver coarse loop of phase-locked that selectively provides having accuracy is within specified amount. In sample mode operation, only PLL coupled to provide an error signal from which oscillation may be derived. second (lock) lock received stream by coupling fine adjusted signal. third (automatic) initially performs calibration de-coupling until steady state has been reached.