Hardware stack structure using programmable logic

作者: Sean W. Kao , James B. Anderson , Arifur Rahman

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摘要: A hardware stack (HSTACK) structure using programmable logic can include a look-up table (LUT) random access memory (RAM) circuit and circuitry within the LUT RAM for propagating data upwards downwards. The be arbitrarily assembled into larger by adding stacks to top portion, bottom or portion between portion. further virtual (VSTACK) coupled HSTACK field gate array (FPGA) fabric. VSTACK arranged in form of an appended peripheral cache control extension address space. auxiliary reset circuit.

参考文章(7)
Peter H. Alfke, Trevor J. Bauer, Steven P. Young, Colm P. Fewer, Large crossbar switch implemented in FPGA ,(2004)
Yayoi Aoki, Method for use of stack ,(2002)
K. Nakamura, K. Sakai, T. Ae, Real-time multimedia data processing using VLIW hardware stack processor Proceedings of 5th International Workshop on Parallel and Distributed Real-Time Systems and 3rd Workshop on Object-Oriented Real-Time Systems. pp. 296- 301 ,(1997) , 10.1109/WPDRTS.1997.637994
Anthony J. Mcauley, Robert Alan Kempke, Michael Philip Lamacchia, Cascadable content addressable memory and system ,(1997)
Balaram Sinharoy, William John Starke, Lee Evan Eisen, James Allan Kahle, Circuits and methods for recovering link stack data upon branch instruction mis-speculation ,(2001)