作者: Liang Chang , Zhaohao Wang , Youguang Zhang , Weisheng Zhao
DOI: 10.1109/NANOARCH.2017.8053713
关键词:
摘要: Data intensive workloads increase significantly bandwidth and power pressures to the memory system. One possible solution is processing-in-memory (PIM) which moves several logic components into main accelerate computation. Recently, concept of processing-in-nonvolatile-memory (PINVM) was proposed against technology issue in DRAM require different metal layer. In addition, PINVM has potential mitigates thermal influence 3D-technology based PIM. Spin-orbit-torque (SOT) Magnetoresistive Random Access Memory (MRAM) one promising NVMs with high energy-efficiency, fast switching, separate read/write paths etc. this paper, we propose a reconfigurable processing-in-SOT MRAM (PISOTM) architecture integrate non-volatile memory. We extend existing interface modify controller obtained various arithmetic function. Several dataintensive are selected evaluate performance our PISOTM architecture. The simulation results show that can achieve high-speedup improvement.