Processor having a plurality of CPUS with one CPU being normally connected to common bus
作者： Masatsugu Kametani
DOI:
关键词:
摘要: A processor for constructing a single system or multiprocessor comprises, within base element constituting the processor, two CPU with associated local memories, dual-port RAM accessible from said CPUs, and common bus switch circuit connecting any one of CPUs to shared by CPUs.
lens.org 参考文章(26)
Vernon C. Gregory, Industrial control processor ,(1977)
Hideo Miyashita, Shoichi Otsuka, Hajimu Inaba, System for controlling a plurality of microprocessors ,(1980)
Finn Brudevold, Interconnection unit for multiple data processing systems ,(1977)
James Nadir, System bus arbitration, circuitry and methodology ,(1978)
Guy W. W. McNally, Real-time data sampling with memory sharing by high speed I/O processor and cycle stealing support processor ,(1981)
Kevin L. Treen, Multiprocessor/multimemory control system ,(1981)
Ralph L. Adcock, Dual port exchange memory between multiple microprocessors ,(1980)
Alan J. Deerfield, Stanley M. Nissen, Bus controller for digital computer system ,(1973)
Don M. Roberts, Leslie R. Sears, Stephen F. Crain, Data acquisition module and method ,(1986)