Instruction prefetching device comprising a circuit for checking prediction for a branch instruction before the instruction is executed

摘要: In a data processing system capable of instructions under pipeline control in plurality stages including an executing stage, instruction prefetching device comprises prediction checking circuit (66, 67) coupled to predicting (52, 53) and (32, 33, 37, 38) prefetch controlling (47, 86) the circuit. one that is prior checks whether or not for branch destination correct. if correct, continued according prediction. If incorrect prediction, correct with corrected immediately after stage. Check may be other than instructions, either unconditional count instruction, address, direction which becomes clear