Analogue-to-digital sigma-delta modulator with FIR filters

摘要: An analogue-to-digital sigma-delta modulator for converting analogue input signals to digital output comprises a feedback path ( 1, 101, 201 ) producing that are function of the (y, Y), an ‘N’-stage (‘N’≧2) integrator 9 14, 109 114 integrating difference signal and signals, quantizer 3, 103 responsive integrated by means Y) at clock intervals. The includes ‘N’ stages 15 17, 115 117 respective ). Each finite impulse response (‘FIR’) filters 19, ), each FIR being same order ‘M’, where ‘M’ is least two; filter 15, stage feeds back first low pass filter. may be discrete-time integrators; reduce their sensitivity voltage step changes would cause non-linearities due slew-rate limitations. Alternatively, continuous-time pulse jitters. In embodiment shown in FIG. 11 , 109, 110 stage, remainder 14 stages.