Formation of bottom junction in vertical FET devices
作者： Kwan-Yong Lim , Steven John Bentley , Hiroaki Niimi , Daniel Chanemougame
DOI:
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摘要: Formation of a bottom junction in vertical FET devices may include, for instance, providing an intermediate semiconductor structure comprising substrate, fin disposed on the substrate. The has top surface, spaced-apart sides. A mask is over surface fin, and at least one sides fin. Portions substrate are removed to define recesses each extending below respective spacers. Semiconductor material grown, such as epitaxially recesses.
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