2-D analytical modeling for electrostatic potential and threshold voltage of a dual work function gate Schottky barrier MOSFET
作者： Prashanth Kumar , Brinda Bhowmick
DOI: 10.1007/S10825-017-1011-X
关键词:
摘要: … However, the dual work function gate SB-MOSFET … SB-MOSFET. Two-dimensional analytical modeling for a dual work function gate (DWG) with a high-k gate dielectric for SB MOSFET …
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sci-hub.se 参考文章(20)
Li Jin, Liu Hong-Xia, Li Bin, Cao Lei, Yuan Bo, Study on two-dimensional analytical models for symmetrical gate stack dual gate strained silicon MOSFETs Chinese Physics B. ,vol. 19, pp. 107302- 107302 ,(2010) , 10.1088/1674-1056/19/10/107302
K.K. Young, Short-channel effect in fully depleted SOI MOSFETs IEEE Transactions on Electron Devices. ,vol. 36, pp. 399- 402 ,(1989) , 10.1109/16.19942
Te-Kuang Chiang, A New Analytical Subthreshold Behavior Model for Single-Halo, Dual-Material Gate Silicon-on-Insulator Metal Oxide Semiconductor Field Effect Transistor Japanese Journal of Applied Physics. ,vol. 47, pp. 8297- 8304 ,(2008) , 10.1143/JJAP.47.8297
Emmanuel Dubois, Guilhem Larrieu, Low Schottky barrier source/drain for advanced MOS architecture: device design and material considerations Solid-state Electronics. ,vol. 46, pp. 997- 1004 ,(2002) , 10.1016/S0038-1101(02)00033-3
Mirgender Kumar, Sarvesh Dubey, Pramod Kumar Tiwari, S. Jit, An analytical model of threshold voltage for short-channel double-material-gate (DMG) strained-Si (s-Si) on Silicon-Germanium-on-Insulator (SGOI) MOSFETs Journal of Computational Electronics. ,vol. 12, pp. 20- 28 ,(2013) , 10.1007/S10825-012-0429-4
Wataru Saitoh, Atsushi Itoh, Shigeharu Yamagami, Masahiro Asada, Analysis of Short-Channel Schottky Source/Drain Metal-Oxide-Semiconductor Field-Effect Transistor on Silicon-on-Insulator Substrate and Demonstration of Sub-50-nm n-type Devices with Metal Gate Japanese Journal of Applied Physics. ,vol. 38, pp. 6226- 6231 ,(1999) , 10.1143/JJAP.38.6226
A. Dimoulas, P. Tsipas, A. Sotiropoulos, E. K. Evangelou, Fermi-level pinning and charge neutrality level in germanium Applied Physics Letters. ,vol. 89, pp. 252110- ,(2006) , 10.1063/1.2410241
J. L. Padilla, L. Knoll, F. Gamiz, Q. T. Zhao, A. Godoy, S. Mantl, Simulation of Fabricated 20-nm Schottky Barrier MOSFETs on SOI: Impact of Barrier Lowering IEEE Transactions on Electron Devices. ,vol. 59, pp. 1320- 1327 ,(2012) , 10.1109/TED.2012.2187657
Harsupreet Kaur, Sneha Kabra, Subhasis Haldar, R.S. Gupta, An analytical threshold voltage model for graded channel asymmetric gate stack (GCASYMGAS) surrounding gate MOSFET Solid-State Electronics. ,vol. 52, pp. 305- 311 ,(2008) , 10.1016/J.SSE.2007.09.006
M. Lundstrom, Z. Ren, Essential physics of carrier transport in nanoscale MOSFETs IEEE Transactions on Electron Devices. ,vol. 49, pp. 133- 141 ,(2002) , 10.1109/16.974760