STATIC CMOS FLIP-FLOP CIRCUIT

摘要: PURPOSE:To enable a high-speed operation equal to CMOS dynamic flip-flop by using the static having high stability of operations. CONSTITUTION:When clock signal is changed from an 'L' level 'H' level, transfer gates 3, 4, 9 and 10 are turned conductive state 7, 8, 11 12 inconductive state. Flip-flop elements on master side holding signals, signals at levels respectively transmitted inverters 1 2 through 10, which set in state, slave 5 6. As result, output Q inverted signal. Since potential difference between both terminals gate always secured almost power supply voltage, large current flows just after capacity can be charged/discharged short time.