Quick resolving latch.
作者： Brian C. Miller , Gordon W. Motley , Peter J. Meier
DOI:
关键词:
摘要: A CMOS latch circuit (202) having a second feedback inverter (208) and switching to switch the out of when is being loaded. first implementation uses single PFET (212) as circuit, incorporates an NFET transistor (304), in parallel with (212). In third implementation, switches power from rather than output signal reduce input capacitance latch.
lens.org 参考文章(10)
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