Dynamic memory system which includes apparatus for performing refresh operations in parallel with normal memory operations

摘要: A memory subsystem for processing requests includes at least a pair of independently addressable dynamic module units. Each unit arrays elements corresponding to number storage locations, separate addressing and data output circuits. The system further common timing, refresh control When the request specifies predetermined type operation, circuits generate signals refreshing location within from which is not being fetched. circuits, upon completion in response another request, refreshes row other parallel with fetching first unit. Upon completing operations both units, signal inhibiting performing mandatory units access inhibited temporarily, enabling continue without interruption.