Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices
作者： Ricardo José Colom-Palero , Rafael Gadea-Girones , Francisco José Ballester-Merelo , Marcos Martı́nez-Peiro
DOI: 10.1016/J.MICPRO.2004.05.003
关键词:
摘要: Abstract This paper presents a flexible filter and control unit structure for implementing different VLSI architectures on two-dimensional DWT. These structures are applied over three architectures: direct approach, Recursive Pyramidal Algorithm (RPA) architecture, new proposed modification of RPA. modified architecture works in non-separable fashion using parallel with distributed to compute all the DWT resolution levels. It is fully modular scalable, low latency high throughput performance. Implementation results based Virtex-II FPGA device included. Real-time video processing achieved.
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