Unified Framework for Logic Diagnosis

摘要: Abstract This paper presents a unified diagnosis method targeting most of the fault models used in practice today. framework is intended to be diagnose faulty behaviors nanometric circuits for which classical stuck-at model far cover all realistic failures. The based on an Effect-Cause approach relies two following main operations. first one critical path tracing (CPT) [4] and consists identifying lines Circuit Under Test (CUT) can source observed errors. second allocating set possible each line, so that root causes failures finally determined. advantage this it does not need explicitly consider during process. 1. Introduction Failure analysis important operation, may impact circuit design fabrication process has growing role fast yield ramping. logical aiming at reducing potential subparts before using more sophisticated physical tools order precisely locate identify defect. knowledge structure circuit, applied test vectors responses these provided by tester (test data log). objective logic leading CUT erroneous behaviour. Information therefore guide observation failure analysis. Thus, efficiency depends resolution There are types approaches, namely