Method and system of revising a layout diagram

Meng-Kai Hsu , Sheng-Hsiung Chen , Wai-Kei Mak , Ting-Chi Wang

3
2020
Generation of Mixed-Driving Multi-Bit Flip-Flops for Power Optimization

Meng-Yun Liu , Yu-Cheng Lai , Wai-Kei Mak , Ting-Chi Wang
1 -9

2
2022
Method and system of generating a layout diagram

Meng-Kai Hsu , Sheng-Hsiung Chen , Wai-Kei Mak , Ting-Chi Wang

2
2021
An Effective Netlist Planning Approach for Double-sided Signal Routing

Tzu-Chuan Lin , Fang-Yu Hsu , Wai-Kei Mak , Ting-Chi Wang
2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC) 288 -293

1
2024
Hybrid-Row-Height Design Placement Legalization Considering Cell Variants

Syuan-Han Liang , Tsu-Ling Hsiung , Wai-Kei Mak , Ting-Chi Wang
363 -367

1
2023
A Bounding Box-based Net Partitioning Method for Double-sided Routing

Fang-Yu Hsu , Tzu-Chuan Lin , Wai-Kei Mak , Ting-Chi Wang
397 -402

2024
Method and system of generating a layout diagram

Meng-Kai Hsu , Sheng-Hsiung Chen , Wai-Kei Mak , Ting-Chi Wang

2023
127
1991
A graph theoretic technique to speed up floorplan area optimization

Ting-Chi Wang , DF Wong
University of Texas at Austin, Department of Computer Sciences

20
1991
Efficient shape curve construction in floorplan design

Ting-Chi Wang , DF Wong
Proceedings of the European Conference on Design Automation. 356 -360

7
1991
Timing-aware layer assignment for advanced process technologies considering via pillars

Genggeng Liu , Xinghai Zhang , Wenzhong Guo , Xing Huang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 ( 6) 1957 -1970

37
2021
LA-SVR: a high-performance layer assignment algorithm with slew violations reduction

Lieqiu Jiang , Zepeng Li , Chenpeng Bao , Genggeng Liu
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) 1 -6

1
2022
SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition

Yidan Jing , Liliang Yang , Zhen Zhuang , Genggeng Liu
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) 1 -6

2022
Through-silicon via planning in 3-D floorplanning

Ming-Chao Tsai , Ting-Chi Wang , TingTing Hwang
IEEE transactions on very large scale integration (vlsi) systems 19 ( 8) 1448 -1457

96
2010
Power minization in LUT-based FPGA technology mapping

Zhi-Hong Wang , En-Cheng Liu , Jianbang Lai , Ting-Chi Wang
635 -640

56
2001
A Mixed-Height Standard Cell Placement Flow for Digital Circuit Block

Yi-Cheng Zhao , Yu-Chieh Lin , Ting-Chi Wang , Ting-Hsiung Wang
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) 328 -331

4
2019
An improvement on lossless compression of VQ indexes

En-Cheng Liu , Ting-Chi Wang
IEEE GLOBECOM 1998 (Cat. NO. 98CH36250) 3 1699 -1704

3
1998
Generation of black-box audio adversarial examples based on gradient approximation and autoencoders

Po-Hao Huang , Honggang Yu , Max Panoff , Ting-Chi Wang
ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 ( 3) 1 -19

2
2022