Ting-Chi Wang
机构: Professor of Computer Science, National Tsing Hua University, Taiwan
主页: nthu.edu.tw
每年引用次数
引用次数
引用: 1,994
H-指数: 23
I10-指数 : 43
出版物: 123
Two-way circuit partitioning by iterative improvement and logic perturbation
Ming-Feng Shen , Shao-Yuan Chen , Shen-Chi Tu , Ting-Chi Wang
international conference on asic 803 -805
6
1999
Performance-driven channel pin assignment algorithms
T.W. Her , Ting-Chi Wang , D.F. Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 14 ( 7) 849 -857
5
1995
Optimal net assignment
Ting-Chi Wang , D.F. Wong , Yachyang Sun , C.K. Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 14 ( 2) 265 -269
1
1995
Faster and better spectral algorithms for multi-way partitioning
Jan-Yang Chang , Yu-Chen Liu , Ting-Chi Wang
asia and south pacific design automation conference 81 -84
1999
Module placement with pre-placed modules using the B*-tree representation
Yi-He Jiang , Jianbang Lai , Ting-Chi Wang
international symposium on circuits and systems 5 347 -350
10
2001
Module placement with pre-placed modules using the corner block list representation
S. Dhamdhere , Ningyu Zhou , Ting-Chi Wang
international symposium on circuits and systems 1 349 -352
3
2002
Optimal circuit clustering with variable interconnect delay
C.N. Sze , Ting-Chi Wang
international symposium on circuits and systems 4 707 -710
1
2002
Buffered tree refinement considering timing and congestion
Wei-Zhi Ye , Ting-Chi Wang
international symposium on vlsi design, automation and test 63 -66
2005
An improved methodology for system-level point-to-point communication architecture synthesis in SOC design
Hao-Yueh Hsieh , Bo-Wei Chen , Ting-Chi Wang
international symposium on vlsi design, automation and test 192 -195
2005
A temperature-aware global router
Yu-Ting Lee , Yen-Jung Chang , Ting-Chi Wang
international symposium on vlsi design, automation and test 279 -282
3
2010
Simple yet effective algorithms for block and I/O buffer placement in flip-chip design
Hao-Yueh Hsieh , Ting-Chi Wang
international symposium on circuits and systems 1879 -1882
10
2005
A new channel pin assignment algorithm and its application to over-the-cell routing
Ting-Chi Wang , D.F. Wong , C.K. Wong
international symposium on circuits and systems 3 1560 -1563
2
1997
Optimal circuit clustering for delay minimization under a more general delay model
C.N. Sze , Ting-Chi Wang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22 ( 5) 646 -651
5
2003
Pad Assignment for Die-Stacking System-in-Package Design
Wai-Kei Mak , Yu-Chen Lin , C. Chu , Ting-Chi Wang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 31 ( 11) 1711 -1722
1
2012
Congestion-Constrained Layer Assignment for Via Minimization in Global Routing
Tsung-Hsien Lee , Ting-Chi Wang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27 ( 9) 1643 -1656
64
2008
On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction
J. Dworak , M.R. Grimaila , B. Cobb , T.-C. Wang
asian test symposium 151 -157
4
2000
Lossless compression of VQ indexes using search-order and correction codes
E.-C. Liu , T.-C. Wang
signal processing systems 202 -209
2
1998
A graph partitioning problem for multiple-chip design
Y.-P. Chen , T.-C. Wang , D.F. Wong
1993 IEEE International Symposium on Circuits and Systems 1778 -1781
6
1993
Optimal floorplan area optimization
T.-C. Wang , D.F. Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 11 ( 8) 992 -1002
64
1992
On over-the-cell channel routing
T.-C. Wang , D. Wong , Y. Sun , C. Wong
european design automation conference 110 -115
8
1993