Design and Verification of a Robust Release Mechanism for CubeSat Deployables

Stefan Damkjar , Collin Cupido , Charles Nokes , Ian R. Mann
canadian conference on electrical and computer engineering 1 -4

2
2019
A wavelength interrogator employing tapered hollow waveguides and a low-cost silicon board camera

Timothy R. Harrison , Graham Hornig , Jorge Marin , Lintong Bu
Next-Generation Spectroscopic Technologies XII 10983

2019
Elementary school education and outreach through the Ex-Alta 1 CubeSat mission

RUTH E FERRARI , ASHLEY J HANSEN , Stefan Damkjar , Callie Lissinna
Physics in Canada 74 ( 3-4)

2
2018
Termination Sequence Generation Circuits for Low-Density Parity-Check Convolutional Codes

S. Bates , D.G. Elliott , R. Swamy
IEEE Transactions on Circuits and Systems I-regular Papers 53 ( 9) 1909 -1917

29
2006
Using computational RAM for volume rendering

A.K. Snip , D.G. Elliott , M. Margala , N.G. Durdle
international conference on asic 253 -257

5
2000
Test and characterization of a variable-capacity multilevel DRAM

J.C. Koob , S.A. Ung , A.S. Rao , D.A. Leder
vlsi test symposium 189 -197

5
2005
Fault models and tests for a 2-bit-per-cell MLDRAM

M. Redeker , B.F. Cockburn , D.G. Elliott
IEEE Design & Test of Computers 16 ( 1) 22 -31

4
1999
Computational RAM: implementing processors in memory

D.G. Elliott , M. Stumm , W.M. Snelgrove , C. Cojocaru
IEEE Design & Test of Computers 16 ( 1) 32 -41

171
1999
Real time 3D rendering patch processing using an embedded SIMD computer architecture

J.S. Mrochuk , D.G. Elliott
canadian conference on electrical and computer engineering 743 -746

2005
Implementation of three SIMD algorithms for graphical user interface processing in mobile devices using the Atsana J2210 media processor

K.C. Breen , J.H. Tapia , D.G. Elliott
canadian conference on electrical and computer engineering 931 -934

1
2005
Fixed-point turbo decoder implementation suitable for embedded applications

M.A. Castellon , I.J. Fair , D.G. Elliott
canadian conference on electrical and computer engineering 1065 -1068

6
2005
HDL2GDS: a fully automated ASIC digital design flow

T.L. Brandon , B.F. Cockburn , D.G. Elliott
canadian conference on electrical and computer engineering 1535 -1538

6
2005
Measuring the potential benefits of a dynamically adaptive cache line size

J.H. Tapia , D.G. Elliott , B.F. Cockburn
canadian conference on electrical and computer engineering 1992 -1995

2005
Design and characterization of an embedded ASIC DRAM

G. Birk , D.G. Elliott , B.E. Cockburn
canadian conference on electrical and computer engineering 1 427 -432

1999
Dynamic combined pattern-parallel and fault-parallel fault simulation on computational RAM

A.L.-C. Kwong , B.F. Cockburn , D.G. Elliott
canadian conference on electrical and computer engineering 1 438 -445

3
1999
A tightly coupled hybrid SIMD/SISD system

N. Aklilu , D.G. Elliott , C.A. Wickman
canadian conference on electrical and computer engineering 1 446 -449

1
1999
Digital controller for an optoelectronic switch with DSP capabilities

B.P.S. Minhas , M. Margala , A.J.P. Hnatiw , R.G. DeCorby
canadian conference on electrical and computer engineering 2 651 -654

1999
Design of a multilevel DRAM with adjustable cell capacity

Yunan Xiang , B.F. Cockburn , D.G. Elliott
canadian conference on electrical and computer engineering 1 295 -300

13
2001
Implementation of DSP-RAM: an architecture for parallel digital signal processing in memory

B.S.-H. Kwan , B.F. Cockburn , D.G. Elliott
canadian conference on electrical and computer engineering 1 341 -345

9
2001
Parallel implementations of transition fault simulation on computational RAM (C/spl middot/RAM)

B.F. Cockburn , A.L.-C. Kwong , D.G. Elliott
canadian conference on electrical and computer engineering 1 5 -8

1
1998