Phase splitter using digital delay locked loops
作者： Feng Lin , R. Jacob Baker
DOI:
关键词: Resolution (electron density) 、 Group delay and phase delay 、 Digital delay locked loop 、 Phase splitter 、 Delay 、 Physics 、 Electronic engineering 、 Phase (waves)
摘要: A phase splitter using digital delay locked loop (DLL) to receive complementary input clock signals generate a plurality of output having different shifts. When the DLL is locked, resolution equal two stages DLL.
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