Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC's

作者: Wayne P. Burleson , Ian G. Harris , Matthew W. Heath

DOI: 10.5555/968878.969060

关键词: Nondeterministic algorithmBlock (data storage)SynchronizationDataflowComputer scienceAsynchronous communicationOverhead (computing)Globally asynchronous locally synchronousEmbedded systemSynchro

摘要: Globally asynchronous locally synchronous (GALS) clocking applied to a system-on-a-chip (SoC) results in design which each core is block (SB) of logic with generated clock. Inter-core communication and controlled by wrapper around the cores. The nondeterministic synchronization used most GALS architectures makes chip-level silicon debug functional test difficult costly. Deterministic methodologies make dataflow assumptions are only valid for very limited set applications. This paper describes novel deterministic methodology called "synchro-tokens" whose parameterized wrappers flexible enough be useful wide range applications while supporting such as1149.1 P1500. validation determinism, estimation area overhead, analysis performance impact detailed.

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