作者: Arun Natarajan , Alberto Valdes-Garcia , Bodhisatwa Sadhu , Scott K. Reynolds , Benjamin D. Parker
DOI: 10.1109/TMTT.2015.2422691
关键词: Optics 、 Varicap 、 BiCMOS 、 Phase (waves) 、 Transceiver 、 Electrical engineering 、 Amplifier 、 Phase shift module 、 Physics 、 W band 、 Noise figure
摘要: This paper discusses the design and implementation of a 94-GHz phased-array transceiver front-end in SiGe BiCMOS that is capable receiving concurrently both vertical (V) horizontal (H) polarizations time-duplexed transmission either polarization. The compact implemented $\hbox{1.3 mm}\times \hbox{ 1.45 mm}$ silicon area to ensure compatibility with scalable tile approach $\lambda/2~(\sim \hbox{1.6 mm})$ spacing between elements. Each includes variable transmitter (TX) receiver (RX) gain 360 $^{\circ}$ phase shift TX RX. Co-integration transmit-receive (T/R) switch power amplifier (PA) low-noise (LNA) matching network minimizes impact on RX noise figure (NF). A varactor-based passive reflection-type shifter (RTPS) shared reduce area. Analysis loss mechanisms on-chip RTPS leads novel load while ensuring amplitude variation across $ . In mode, achieves 30-dB gain, bandwidth 15 GHz (84–99 GHz) 10-dB NF high-gain mode. $> 2-dBm saturated output 0-dBm output-referred 1-dB compression point (OP1dB) V H (time-duplexed), 8-GHz (89–97 GHz). shifters achieve full 5-bit resolution (11.25 resolution) error rms at 94 GHz. consumes 160 mW mode for dual-polarization concurrent reception/phase-shifting 116 $W$ -band.