作者: Kenichi Okada , Ryo Minami , Yuuki Tsukui , Seitaro Kawai , Yuuki Seo
DOI: 10.1109/ISSCC.2014.6757463
关键词: Transceiver 、 Baseband 、 Physics 、 Preamplifier 、 Electronic engineering 、 Amplifier 、 Phase-locked loop 、 Transmitter 、 Quadrature amplitude modulation 、 Electrical engineering 、 CMOS
摘要: This paper presents a 64-QAM 60GHz CMOS transceiver, which achieves TX-to-RX EVM of -26.3dB and can transmit 10.56Gb/s in all four channels defined IEEE802.11ad/WiGig. By using 4-bonded channel, 28.16Gb/s be transmitted 16QAM. The front-end consumes 251mW 220mW from 1.2-V supply transmitting receiving mode, respectively. Figure 20.3.1 shows the direct-conversion design. transmitter consists 6-stage PA, differential preamplifiers, I/Q passive mixers quadrature injection-locked oscillator (QILO). receiver 4-stage LNA, amplifiers, double-balanced mixers, QILO, baseband amplifiers. A architecture is employed for both TX RX because wide-bandwidth capability [1]. LO QILO 20GHz PLL. works as frequency tripler with integrated It generate 7 carrier frequencies 36/40MHz reference, 58.32GHz(ch.1), 60.48GHz(ch.2), 62.64GHz(ch.3), 64.80GHz(ch.4) IEEE802.11ad/WiGig, 59.40GHz(ch.1-2), 61.56GHz(ch.2-3), 63.72GHz(ch.3-4) channel bonding.