Influence of vacuum environment on conductive atomic force microscopy measurements of advanced metal-oxide-semiconductor gate dielectrics

摘要: Most of the knowledge about electrical behavior gate dielectric materials has been gained from measurements performed on macroscopic metal-oxide-semiconductor MOS capacitors or transistors using standard characterization methods at wafer level. Although very important information obtained these methods, they provide spatially averaged properties material. On contrary, conductive atomic force microscopy CAFM allows us to characterize topographically and electrically with nanometer resolution. The works bare surfaces tip plays role metal electrode a sized capacitor an area few hundreds nm2. Therefore, allow study spatial distribution current throughout device its dependence applied voltage. To grant flow between sample, must work in contact mode. Due that, when scanning air CAFM, some undetermined reaction occurs sample probably related water and/or hydrocarbons , which can cause loss conductivity In addition, carriers are injected tip, local anodic oxidation is triggered. All effects even worse for high-k devices. avoid problems, one possibility could be measuring con-