A low-delay common subexpression elimination algorithm for constant matrix multiplications over GF(2 m )

作者: Xiaoqiang Zhang , Ning Wu , Lidong Lan , Yaoping Liu

DOI: 10.1109/ICIEA.2015.7334149

关键词: Set (abstract data type)GF(2)Constant (mathematics)Computational complexity theoryCommon subexpression eliminationAlgorithmGreedy algorithmArithmeticPartial redundancy eliminationMatrix multiplicationMathematics

摘要: In this work, a low-delay common subexpression elimination (LDCSE) algorithm is proposed. Unlike the previous (CSE) algorithms, which mostly focus on area, aim of LDCSE to optimize both area and delays in hardware implementations constant matrix multiplication over GF(2m). A lower computational complexity gate-level delay computing method proposed compute according transformed matrices. The new CSE employs greedy search set subexpressions with minimal area-delay-product (ADP). Experimental results have shown that achieves smaller ADP compared works.

参考文章(10)
M. M. Wong, M. L. D. Wong, A new common subexpression elimination algorithm with application in composite field AES S-box information sciences, signal processing and their applications. pp. 452- 455 ,(2010) , 10.1109/ISSPA.2010.5605445
Ning Chen, Zhiyuan Yan, Cyclotomic FFTs With Reduced Additive Complexities Based on a Novel Common Subexpression Elimination Algorithm IEEE Transactions on Signal Processing. ,vol. 57, pp. 1010- 1020 ,(2009) , 10.1109/TSP.2008.2009891
Youngjoo Lee, Hoyoung Yoo, In-Cheol Park, Low-Complexity Parallel Chien Search Structure Using Two-Dimensional Optimization IEEE Transactions on Circuits and Systems Ii-express Briefs. ,vol. 58, pp. 522- 526 ,(2011) , 10.1109/TCSII.2011.2158709
X. Zhang, K.K. Parhi, On the Optimum Constructions of Composite Field for the AES Algorithm IEEE Transactions on Circuits and Systems Ii-express Briefs. ,vol. 53, pp. 1153- 1157 ,(2006) , 10.1109/TCSII.2006.882217
Ning Chen, Zhiyuan Yan, High-performance designs of AES transformations international symposium on circuits and systems. pp. 2906- 2909 ,(2009) , 10.1109/ISCAS.2009.5118410
Hyeong-Ju Kang, In-Cheol Park, FIR filter synthesis algorithms for minimizing the delay and the number of adders IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing. ,vol. 48, pp. 770- 777 ,(2001) , 10.1109/82.959867
Oscar Gustafsson, Mikael Olofsson, Complexity Reduction of Constant Matrix Computations over the Binary Field Arithmetic of Finite Fields. pp. 103- 115 ,(2007) , 10.1007/978-3-540-73074-3_9
A.P. Chandrakasan, M. Potkonjak, R. Mehra, J. Rabaey, R.W. Brodersen, Optimizing power using transformations IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. ,vol. 14, pp. 12- 31 ,(1995) , 10.1109/43.363126
C. Paar, Optimized arithmetic for Reed-Solomon encoders international symposium on information theory. pp. 250- ,(1997) , 10.1109/ISIT.1997.613165
Ning Wu, Xiaoqiang Zhang, Yunfei Ye, Lidong Lan, A New Common Subexpression Elimination Algorithm for Constant Matrix Multiplications Over Binary Field Transactions on Engineering Technologies. pp. 131- 145 ,(2014) , 10.1007/978-94-017-9115-1_11