Method to analyze an analog circuit design with a verification program
作者： Kevin D. Jones , Qiang Hong , Paul Wong
DOI:
关键词: Electronic engineering 、 Analog signal processing 、 Data structure 、 Computer science 、 Analog device 、 Algorithm 、 Constraint satisfaction problem 、 Analog circuit design
摘要: Data structures and algorithms are provided to automatically generate an analog stimulus apply a simulation of the DUT. A constraint solver is determine suitable values use in generation. The random within range allowed values. For example, number different stimuli generated for successive application DUT, each with magnitude magnitudes. monitor electrical properties at nodes define constraints on whether were violated. coverage conditions domain defined have been satisfied.
lens.org 参考文章(13)
David J. Karpik, Gerard J. Karpik, Scott A. Miers, Michael A. Lehman, Vehicle suspension system with variable geometry ,(2000)
Land D. Fleming, Jane T. Malin, Global qualitative flow-path modeling for local state determination in simulation and analysis ,(1994)
Peter Ballam, Method of identifying an accurate model ,(2000)
Daniel Marcos Chapiro, Won Sub Kim, Mary Lynn Meyer, Method and apparatus for random stimulus generation ,(1999)
Daniel Marcos Chapiro, Won Sub Kim, John Harold Downey, Method and apparatus for adaptive verification of circuit designs ,(1999)
Yoav Hollander, Method and apparatus for test generation during circuit design ,(1998)
Douglas E. Wallace, Jonathan P. Dowling, Programmable pattern generation for dynamic bus signal integrity analysis ,(2003)
Rodney A. Browen, Cherif Ahrikencheikh, William P. Darbie, Kay C. Lannen, John E. Mcdermid, Jamie P. Romero, Method and apparatus for board model correction ,(1999)
Peter Ballam, Method of verification ,(2000)
Daniel Marcos Chapiro, Valeria Maria Bertacco, Won Sub Kim, Sandro Hermann Pintz, Method and apparatus for determining expected values during circuit design verification ,(1999)