Techniques and algorithms for fault grading of FPGA interconnect test configurations
作者： M.B. Tahoori , S. Mitra
关键词: Fault grading 、 Computer hardware 、 Computer engineering 、 Engineering 、 Programmable logic device 、 Post-silicon validation 、 Fault coverage 、 Stuck-at fault 、 Programmable logic array 、 Reconfigurable computing 、 Fault (power engineering)
摘要: Conventional fault simulation techniques for field programmable gate arrays (FPGAs) are very complicated and time consuming. The alternative, FPGA emulation technique, is incomplete can be used only after the chip manufactured. In this paper, we present efficient algorithms computing coverage of a given test configuration. faults considered opens shorts in interconnects. presented technique able to report all detectable undetectable and, compared with conventional methods, orders magnitude faster.
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