Methodology for & results from the use of a hardware logic simulation engine for fault simulation
作者： Roy R. Rezac , Leslie Turner Smith
DOI:
关键词: Computer science 、 Software fault 、 Logic simulation 、 Software fault tolerance 、 Software simulator 、 Embedded system 、 Computer hardware
摘要: Software fault simulation programs. whether serial. parallel. deductive or concurrent. have been the accepted approach for grading test patterns qualifying diagnostic With advent of hardware engines. a potentially faster method doing has arisen. This paper reports on new methodology use both engine and concurrent software simulator to assist in verifying
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