Temperature‐dependency analysis and correction methods of in situ power‐loss estimation for crystalline silicon modules undergoing potential‐induced degradation stress testing

摘要: We propose a method for in situ characterization of the photovoltaic module power at standard test conditions, using superposition dark current-voltage (I-V) curve measured elevated stress temperature, during potential-induced degradation (PID) testing. PID chamber studies were performed on several crystalline silicon designs to determine extent which temperature dependency maximum is affected by modules. The results principle show mismatch between and 25 °C, dependent design, level degradation. investigate correction this two maximum-power translation methods found literature. For first method, based coefficient, we find that coefficient changes as degrades PID, thus limiting its applicability. second investigated founded two-diode model, allows fundamental analysis degradation, but does not lend itself large-scale data collection analysis. Last, validate experimentally simpler more accurate taking advantage near-linear relationship This reduces duration cost, avoids transients while ramping from eliminates flash testing except initial final points, enables significantly faster detailed acquisition statistical future application various reliability models. Potential-induced modules depends conditions I-V testing, avoiding