作者: Erwan Fabiani , Dominique Lavenier
DOI: 10.1007/3-540-44614-1_101
关键词: Phase (waves) 、 Knapsack problem 、 Computational science 、 Field-programmable gate array 、 Computer science 、 Locality 、 Linear arrays 、 Routing (electronic design automation) 、 Algorithm 、 Systolic array
摘要: This paper presents a methodology for mapping linear processor arrays onto FPGA components. By taking advantage of regularity and locality properties these structures, placement is pre-defined, allowing vendor tools to skip this phase produce fast optimized routing.