Bridging the gap between compilation and synthesis in the DEFACTO system

摘要: The DEFACTO project - a Design Environment For Adaptive Computing TechnOlogy is system that maps computations, expressed in high-level languages such as C, directly onto FPGA-based computing platforms. Major challenges are the inherent flexibility of FPGA hardware, capacity and timing constraints target devices, accompanying speed-area trade-offs. To address these, combines parallelizing compiler technology with behavioral VHDL synthesis tools, obtaining complementary advantages compiler's analyses transformations synthesis' binding, allocation scheduling low-level hardware resources. guide search good solution, we introduce notion balance between rates at which data fetched from memory accessed by computation, combined estimation synthesis. Since designs offer potential for optimizing memory-related operations, have also incorporated ability to exploit parallel accesses customize access protocols into analysis.