作者: Cheng-Chung Tsao , Tien-Ler Lin
DOI:
关键词: Row 、 Computer hardware 、 Electronic circuit 、 Word (computer architecture) 、 Integrated circuit 、 Semiconductor memory 、 Parallel computing 、 Page buffers 、 Column (typography) 、 Computer science 、 Bit line
摘要: A nonvolatile semiconductor memory includes a plurality of cells arranged in columns and rows, word lines, bit output buffers, page buffers grouped sub-pages. Each buffer is connected to corresponding lines through first column decoder circuit one second circuit. This construction allows the peripheral control circuits clock out data stored sub-page into while latching line sub-page. Therefore, this architecture able perform read update different sub-pages simultaneously. Two sets address registers are used store starting end for programming. During programming, only located between will be programmed successively. programming technique greatly reduces disturbance time.