Dual channel memory

作者: Zhijiong Luo

DOI:

关键词: Semiconductor deviceSubstrate (printing)Open-circuit voltageMaterials scienceMemory cellDual (category theory)DopingCommunication channelElectrical engineeringThermal conduction

摘要: Technologies are generally described related to a dual channel memory device, system and method of manufacture. Various devices include utilization both front back through substrate formed underneath gate structure semiconductor device. Using two pairs contacts on opposing sides the structure, where contact differently doped layers multiple bits may be stored in device acting as single cell. Memorization realized by storing different amount or types charges floating gate, impact conduction status channels By detecting channels, such open circuit, close high resistance, low data (“0” “1”) detected.

参考文章(44)
David L. Kencke, Sanjay K. Banerjee, Vertical channel floating gate transistor having silicon germanium channel layer United States Patent and Trademark Office. ,(2000) , 10.26153/TSW/4351
Mark L. Doczy, Justin K. Brask, Brian S. Doyle, Marko Radosavljevic, Robert S. Chau, Uday Shah, Suman Datta, Amlan Majumdar, Jack Kavalieros, Block Contact Architectures for Nanoscale Channel Transistors ,(2005)
Haizhou Yin, Huilong Zhu, Zhijiong Luo, Semiconductor structure and method for manufacturing the same ,(2011)
Zhijiong Luo, Haizhou Yin, Huilong Zhu, Mosfet structure and method for fabricating the same ,(2010)
Eng Huat Toh, Jeoung Mo Koo, Shyue Seng Tan, Danny Shum, Elgin Kiok Boone Quek, Simple and cost-free mtp structure ,(2015)