Direct search approach to integrated circuit sizing for high parametric yield
作者： G. Cijan , T. Tuma , Á. Bűrmen
DOI: 10.1049/IET-CDS.2010.0094
关键词: Electronic engineering 、 Electronic circuit 、 Parametric statistics 、 Integrated circuit 、 Dimensioning 、 Engineering 、 Algorithm 、 Process (computing) 、 Sizing 、 Gradient method 、 Computer simulation
摘要: This study proposes a gradient-free approach to integrated circuit sizing that takes into account the statistical variations of device parameters and ranges operating conditions. A novel algorithm for solving worst-case performance problem is proposed. The proposed produces corners are used in optimisation loop process. set dynamically updated during sizing. number kept low by considering only sufficiently unique. final result exhibiting specified parametric yield. was tested on several circuits results were verified with Monte–Carlo analysis distances. All resulting obtained up 12 h single processor exhibited method can easily be parallelised an extent bring runtime range hour or less.
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