Method for manufacturing crown-shaped storage capacitors on dynamic random access memory cells

摘要: A method for manufacturing an array of dynamic random access memory (DRAM) cells having a single crown-shaped or double stacked capacitors is accomplished. The involves forming device areas on silicon substrate in which FETs the DRAM are formed. After bit line contacts and metallurgy contacting one two source/drain each FET, thick low melting temperature glass (BPSG) deposited planarized by annealing. Node capacitor contact openings formed BPSG using polysilicon sidewall that reduces size, layer to node FETs, also provides planar surface. specially designed edge phase-shift mask then used with positive photoresist pattern form bottom electrodes. completed depositing interelectrode dielectric top electrode. second design capacitor. These new estimated increase capacitance over more conventional about 50 115%, respectively.