Post passivation structure for semiconductor chip or wafer

作者: Jin-Yuan Lee , Mou-Shiung Lin

DOI:

关键词: Flip chipMaterials scienceWaferCopper interconnectSputteringPhotoresistElectronic engineeringElectroplatingSignalOptoelectronicsPassivation

摘要: The present invention adds one or more thick layers of polymer dielectric and thick, wide metal lines on top a finished semiconductor wafer, post-passivation. may be used for long signal paths can also power buses planes, clock distribution networks, critical signal, re-distribution I/O pads flip chip applications. Photoresist defined electroplating, sputter/etch, dual triple damascene techniques are forming the via fill.

参考文章(66)
Mona A. Chopra, James F. Wenzel, Stephen W. Foster, Semiconductor device having built-in high frequency bypass capacitor ,(1995)
Chanh N. Nguyen, Minh V. Le, Nguyen Xuan Nguyen, Modulation-doped field-effect transistors and fabrication processes ,(1998)
Gonzalo Amador, Howard R. Test, Willmar E. Subido, Wire bonding process for copper-metallized integrated circuits ,(2001)
Michio Asahina, Kazuki Matsumoto, Yukio Morozumi, Semiconductor devices and methods for manufacturing the same ,(2001)
Yang-Tung Fan, Fu-Jier Fan, Chiou-Shian Peng, Kuo-Wei Lin, Cheng-Yu Chu, Shih-Jane Lin, Yen-Ming Chen, Bumping process to increase bump height and to create a more robust bump structure ,(2003)