作者: Mohit D. Ganeriwala , Enrique G. Marin , Francisco G. Ruiz , Nihar R. Mohapatra
DOI: 10.1109/ULIS.2018.8354767
关键词: AND gate 、 Capacitance 、 Computational physics 、 Solver 、 Semiconductor device modeling 、 Schrödinger equation 、 Physics 、 Transistor 、 Logic gate 、 Nanowire
摘要: In this paper, we present a computationally efficient compact model for calculating the charges and gate capacitance of III-V cylindrical nanowire transistors. We proposed an approximation which decouples Poisson Schrodinger equation addresses issues developing analytical model. Using approximation, derived suitable circuit simulators. The is physics based does not include any empirical parameters. accuracy verified across nanowires different sizes materials using simulation results from 2D Poisson-Schrodinger solver.