Approximate compressors for error-resilient multiplier design

作者: Zhixi Yang , Jie Han , Fabrizio Lombardi

DOI: 10.1109/DFT.2015.7315159

关键词: MathematicsMathematical optimizationSignal processingSharpeningMultiplier (economics)Gas compressorApproximation algorithmCircuit designAdderAlgorithmPartial product reduction

摘要: Approximate circuit design is an innovative paradigm for error-resilient image and signal processing applications. Multiplication often a fundamental function many of these In this paper, three approximate compressors are proposed with accuracy constraint the partial product reduction (PPR) in multiplier. Both approximation truncation considered multiplier design. An sharpening algorithm then investigated as application designs. Extensive simulation results show that designs achieve significant reductions area power while achieving high signal-to-noise ratio (SNR > 35 dB), compared to their exact counterparts well other multipliers.

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