Fault and Defect Modeling
作者： Zainalabedin Navabi
DOI: 10.1007/978-1-4419-7548-5_3
关键词: Computer science 、 Representation (systemics) 、 Phenomenon 、 Object (computer science) 、 Fault (power engineering) 、 Algorithm
摘要: A model of a physical object or phenomenon is representation the phenomenon that used for specific purpose analyzing behavior object, studying phenomenon, effect on its environment surroundings. computer simulation program uses model. The information we obtain from running depends simulation. For example, circuit can be developed predicting temperature radiation, logical behavior, when becomes faulty.
springer.com
sci-hub.st 参考文章(19)
F. Stott, C. Timoc, L. Hess, C. Pina, M. Buehler, T. Griswold, Logical Models of Physical Failures. international test conference. pp. 546- 553 ,(1983)
Niraj Kumar Jha, DETECTING MULTIPLE FAULTS IN CMOS CIRCUITS. international test conference. pp. 514- 519 ,(1986)
Edward J. McCluskey, Joseph L. A. Hughes, Multiple Stuck-At Fault Coverage of Single Stuck-At Fault Test Sets. international test conference. pp. 368- 374 ,(1986)
Yashwant K. Malaiya, Rochit Rajsuman, Bridging faults and IDDQ testing IEEE Computer Society Press. ,(1992)
Sandeep Gupta, Niraj K. Jha, Testing of Digital Systems ,(2003)
Miron Abramovici, Melvin A. Breuer, Arthur D. Friedman, Digital Systems Testing and Testable Design ,(1990)
M. Bushnell, Vishwani Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits ,(2013)
Richard D. Eldred, Test Routines Based on Symbolic Logical Statements Journal of the ACM. ,vol. 6, pp. 33- 37 ,(1959) , 10.1145/320954.320957
Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory, Fault Equivalence in Combinational Logic Networks IEEE Transactions on Computers. ,vol. C-20, pp. 1286- 1293 ,(1971) , 10.1109/T-C.1971.223129
R. L. Wadsack, Fault Modeling and Logic Simulation of CMOS and MOS Integrated Circuits Bell System Technical Journal. ,vol. 57, pp. 1449- 1474 ,(1978) , 10.1002/J.1538-7305.1978.TB02106.X