High-speed serial data signal interface architectures for programmable logic devices
作者： Sergey Shumarayev , Wilson Wong , Thungoc M. Tran , Tim Tri Hoang
DOI:
关键词: Serial port 、 Signal 、 Communication channel 、 Integrated circuit 、 Computer hardware 、 Phase-locked loop 、 Serial communication 、 Interface (computing) 、 Computer science 、 Programmable logic device
摘要: A programmable logic device integrated circuit (“PLD”) includes high-speed serial interface (“HSSI”) circuitry in addition to circuitry. The HSSI multiple channels of nominal data-handling (typically including clock and data recovery (“CDR”) circuitry), at least one channel management unit (“CMU”) phase-locked loop (“PLL”) or the like). To increase flexibility with which can be used, are equipped alternatively perform CMU-type functions, CMU is functions.
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